From 95fd6ae836ab5fee7387f4df46b727165a05b723 Mon Sep 17 00:00:00 2001 From: Paul Oliver Date: Thu, 25 Jun 2026 04:42:23 +0200 Subject: Adds v1 unit tests and fixes bugs found by them --- test/ui/v1/ifnzs/ui.c | 46 ++++++++++++++++++++++++++++++++++++++++++++++ test/ui/v1/ifnzs/vars.py | 3 +++ 2 files changed, 49 insertions(+) create mode 100644 test/ui/v1/ifnzs/ui.c create mode 100644 test/ui/v1/ifnzs/vars.py (limited to 'test/ui/v1/ifnzs') diff --git a/test/ui/v1/ifnzs/ui.c b/test/ui/v1/ifnzs/ui.c new file mode 100644 index 0000000..57e9533 --- /dev/null +++ b/test/ui/v1/ifnzs/ui.c @@ -0,0 +1,46 @@ +#if !defined(COMMAND_NEW) +#error +#endif + +int main(void) { + salis_init(); + + uint64_t next_addr = 0; + + while (mvec_is_proc_owner(g_cores, g_cores->pvec->ip, g_cores->pcur)) { + assert(g_cores->pvec->ip == next_addr); + + if (mvec_get_inst(g_cores, g_cores->pvec->ip) == ifnz) { + switch (mvec_get_inst(g_cores, g_cores->pvec->ip + 1)) { + case nop0: + next_addr += g_cores->pvec->r0x ? 1 : 2; + break; + case nop1: + next_addr += g_cores->pvec->r1x ? 1 : 2; + break; + case nop2: + next_addr += g_cores->pvec->r2x ? 1 : 2; + break; + case nop3: + next_addr += g_cores->pvec->r3x ? 1 : 2; + break; + default: + next_addr += g_cores->pvec->r0x ? 0 : 1; + } + } + + salis_step(1); + next_addr++; + + assert(g_cores->pvec->ip == next_addr); + } + + assert(g_cores->pvec->ip == ANC_SIZE); + assert(g_cores->pvec->r0x == 2); + assert(g_cores->pvec->r1x == 2); + assert(g_cores->pvec->r2x == 2); + assert(g_cores->pvec->r3x == 2); + + salis_free(); + return 0; +} diff --git a/test/ui/v1/ifnzs/vars.py b/test/ui/v1/ifnzs/vars.py new file mode 100644 index 0000000..9c2a9f3 --- /dev/null +++ b/test/ui/v1/ifnzs/vars.py @@ -0,0 +1,3 @@ +flags = set() +defines = set() +links = set() -- cgit v1.2.1