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// file : test/ui/v1/noops/ui.c
// project : Salis-VM
// author : Paul Oliver <contact@pauloliver.dev>
#include <assert.h>
#include <stdint.h>
#include <threads.h>
#include <zlib.h>
#include "arch_spec.h"
#include "arch_inst.h"
#include "compress.h"
#include "salis.h"
static uint8_t g_anc_bytes[] = ANC_BYTES;
static void check_invariants(void) {
assert(g_cores->mall == ANC_SIZE);
assert(g_cores->muta[0] == 0);
assert(g_cores->muta[1] == 0);
assert(g_cores->muta[2] == 0);
assert(g_cores->muta[3] == 0);
assert(g_cores->pnum == 1);
assert(g_cores->pcap == 1);
assert(g_cores->pfst == 0);
assert(g_cores->plst == 0);
assert(g_cores->pcur == 0);
assert(g_cores->psli == 1);
for (uint64_t i = 0; i < SYNC_INTERVAL; i++) {
assert(g_cores->ivav[i] == 0);
assert(g_cores->iviv[i] == 0);
}
for (uint64_t i = 0; i < MVEC_SIZE; i++) {
if (i < ANC_SIZE) {
assert(mvec_get_inst(g_cores, i) == g_anc_bytes[i]);
} else {
assert(mvec_get_inst(g_cores, i) == 0);
}
}
assert(g_cores->pvec->mb0a == 0);
assert(g_cores->pvec->mb0s == ANC_SIZE);
assert(g_cores->pvec->mb1a == 0);
assert(g_cores->pvec->mb1s == 0);
assert(g_cores->pvec->r0x == 0);
assert(g_cores->pvec->r1x == 0);
assert(g_cores->pvec->r2x == 0);
assert(g_cores->pvec->r3x == 0);
assert(g_cores->pvec->s0 == 0);
assert(g_cores->pvec->s1 == 0);
assert(g_cores->pvec->s2 == 0);
assert(g_cores->pvec->s3 == 0);
assert(g_cores->pvec->s4 == 0);
assert(g_cores->pvec->s5 == 0);
assert(g_cores->pvec->s6 == 0);
assert(g_cores->pvec->s7 == 0);
assert(g_cores->amb0 == 0.);
assert(g_cores->amb1 == 0.);
assert(g_cores->emb1 == 0);
assert(g_cores->eliv == 0);
assert(g_cores->edea == 0);
for (uint64_t i = 0; i < MVEC_SIZE; i++) {
assert(g_cores->aeva.data[i] == 0);
assert(g_cores->beva.data[i] == 0);
}
// V1 arch specific
for (uint64_t i = 0; i < ARCH_INST_COUNT; i++) {
assert(g_cores->ipop[i] == 0);
assert(g_cores->iwrt[i] == 0);
}
assert(g_cores->wmb0 == 0);
assert(g_cores->wmb1 == 0);
assert(g_cores->wdea == 0);
assert(g_cores->hlts == 0);
for (uint64_t i = 0; i < MVEC_SIZE; i++) {
assert(g_cores->weva.data[i] == 0);
assert(g_cores->xeva.data[i] == 0);
}
}
static void check_variants(void) {
assert(g_cores->step == g_step);
assert(g_cores->cycl == g_step);
assert(g_cores->ivpt == g_step);
assert(g_cores->pvec->ip == g_step);
assert(g_cores->pvec->sp == g_step);
assert(g_cores->emb0 == g_step);
for (uint64_t i = 0; i < MVEC_SIZE; i++) {
assert(g_cores->eeva.data[i] == (i < g_step ? 1 : 0));
}
// V1 arch specific
for (uint64_t i = 0; i < ARCH_INST_COUNT; i++) {
uint64_t exed = 0;
for (uint64_t j = 0; j < g_step; j++) {
if (mvec_get_inst(g_cores, j) == i) {
exed++;
}
}
assert(g_cores->iexe[i] == exed);
}
}
static void check_final(void) {
assert(g_cores->pvec->ip == ANC_SIZE);
assert(g_cores->pvec->sp == ANC_SIZE);
}
int main(void) {
salis_init();
check_invariants();
check_variants();
while (mvec_is_proc_owner(g_cores, g_cores->pvec->ip, g_cores->pcur)) {
salis_step(1);
check_invariants();
check_variants();
}
check_final();
salis_save_and_free();
return 0;
}
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