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-rw-r--r--test/ui/v1/1rops/ui.c64
-rw-r--r--test/ui/v1/1rops/vars.py3
-rw-r--r--test/ui/v1/2rops/ui.c46
-rw-r--r--test/ui/v1/2rops/vars.py3
-rw-r--r--test/ui/v1/3rops/ui.c60
-rw-r--r--test/ui/v1/3rops/vars.py3
-rw-r--r--test/ui/v1/addrs/ui.c47
-rw-r--r--test/ui/v1/addrs/vars.py3
-rw-r--r--test/ui/v1/allos/ui.c90
-rw-r--r--test/ui/v1/allos/vars.py3
-rw-r--r--test/ui/v1/ifnzs/ui.c46
-rw-r--r--test/ui/v1/ifnzs/vars.py3
-rw-r--r--test/ui/v1/ioops/ui.c55
-rw-r--r--test/ui/v1/ioops/vars.py3
-rw-r--r--test/ui/v1/jumps/ui.c21
-rw-r--r--test/ui/v1/jumps/vars.py3
-rw-r--r--test/ui/v1/mbops/ui.c36
-rw-r--r--test/ui/v1/mbops/vars.py3
-rw-r--r--test/ui/v1/stack/ui.c75
-rw-r--r--test/ui/v1/stack/vars.py3
20 files changed, 570 insertions, 0 deletions
diff --git a/test/ui/v1/1rops/ui.c b/test/ui/v1/1rops/ui.c
new file mode 100644
index 0000000..9c96470
--- /dev/null
+++ b/test/ui/v1/1rops/ui.c
@@ -0,0 +1,64 @@
+#if !defined(COMMAND_NEW)
+#error
+#endif
+
+int main(void) {
+ salis_init();
+
+ while (mvec_is_proc_owner(g_cores, g_cores->pvec->ip, g_cores->pcur)) {
+ uint8_t inst = mvec_get_inst(g_cores, g_cores->pvec->ip);
+
+ if (inst != incn && inst != decn && inst != notn && inst != shfl && inst != shfr && inst != zero && inst != unit) {
+ salis_step(1);
+ continue;
+ }
+
+ uint64_t *reg = &g_cores->pvec->r0x;
+
+ switch (mvec_get_inst(g_cores, g_cores->pvec->ip + 1)) {
+ case nop0:
+ reg = &g_cores->pvec->r0x;
+ break;
+ case nop1:
+ reg = &g_cores->pvec->r1x;
+ break;
+ case nop2:
+ reg = &g_cores->pvec->r2x;
+ break;
+ case nop3:
+ reg = &g_cores->pvec->r3x;
+ break;
+ }
+
+ uint64_t reg_val = *reg;
+
+ salis_step(1);
+
+ switch (inst) {
+ case incn:
+ assert(*reg == reg_val + 1);
+ break;
+ case decn:
+ assert(*reg == reg_val - 1);
+ break;
+ case notn:
+ assert(*reg == !reg_val);
+ break;
+ case shfl:
+ assert(*reg == reg_val << 1);
+ break;
+ case shfr:
+ assert(*reg == reg_val >> 1);
+ break;
+ case zero:
+ assert(*reg == 0);
+ break;
+ case unit:
+ assert(*reg == 1);
+ break;
+ }
+ }
+
+ salis_free();
+ return 0;
+}
diff --git a/test/ui/v1/1rops/vars.py b/test/ui/v1/1rops/vars.py
new file mode 100644
index 0000000..9c2a9f3
--- /dev/null
+++ b/test/ui/v1/1rops/vars.py
@@ -0,0 +1,3 @@
+flags = set()
+defines = set()
+links = set()
diff --git a/test/ui/v1/2rops/ui.c b/test/ui/v1/2rops/ui.c
new file mode 100644
index 0000000..5fcf65f
--- /dev/null
+++ b/test/ui/v1/2rops/ui.c
@@ -0,0 +1,46 @@
+#if !defined(COMMAND_NEW)
+#error
+#endif
+
+int main(void) {
+ salis_init();
+
+ while (mvec_is_proc_owner(g_cores, g_cores->pvec->ip, g_cores->pcur)) {
+ uint8_t inst = mvec_get_inst(g_cores, g_cores->pvec->ip);
+
+ if (inst != dupl && inst != swap) {
+ salis_step(1);
+ continue;
+ }
+
+ uint64_t *regs[2] = {
+ &g_cores->pvec->r0x,
+ &g_cores->pvec->r0x,
+ };
+
+ for (uint64_t i = 0; i < 2; i++) {
+ uint8_t rmod = mvec_get_inst(g_cores, g_cores->pvec->ip + 1 + i);
+ if (rmod == nop0) regs[i] = &g_cores->pvec->r0x;
+ else if (rmod == nop1) regs[i] = &g_cores->pvec->r1x;
+ else if (rmod == nop2) regs[i] = &g_cores->pvec->r2x;
+ else if (rmod == nop3) regs[i] = &g_cores->pvec->r3x;
+ else break;
+ }
+
+ uint64_t reg_vals[2] = {*regs[0], *regs[1]};
+ salis_step(1);
+
+ switch (inst) {
+ case dupl:
+ assert(*regs[1] == reg_vals[0]);
+ break;
+ case swap:
+ assert(*regs[0] == reg_vals[1]);
+ assert(*regs[1] == reg_vals[0]);
+ break;
+ }
+ }
+
+ salis_free();
+ return 0;
+}
diff --git a/test/ui/v1/2rops/vars.py b/test/ui/v1/2rops/vars.py
new file mode 100644
index 0000000..9c2a9f3
--- /dev/null
+++ b/test/ui/v1/2rops/vars.py
@@ -0,0 +1,3 @@
+flags = set()
+defines = set()
+links = set()
diff --git a/test/ui/v1/3rops/ui.c b/test/ui/v1/3rops/ui.c
new file mode 100644
index 0000000..e4e2d83
--- /dev/null
+++ b/test/ui/v1/3rops/ui.c
@@ -0,0 +1,60 @@
+#if !defined(COMMAND_NEW)
+#error
+#endif
+
+int main(void) {
+ salis_init();
+
+ while (mvec_is_proc_owner(g_cores, g_cores->pvec->ip, g_cores->pcur)) {
+ uint8_t inst = mvec_get_inst(g_cores, g_cores->pvec->ip);
+
+ if (inst != addn && inst != subn && inst != muln && inst != divn) {
+ salis_step(1);
+ continue;
+ }
+
+ uint64_t *regs[3] = {
+ &g_cores->pvec->r0x,
+ &g_cores->pvec->r0x,
+ &g_cores->pvec->r0x,
+ };
+
+ for (uint64_t i = 0; i < 3; i++) {
+ uint8_t rmod = mvec_get_inst(g_cores, g_cores->pvec->ip + 1 + i);
+ if (rmod == nop0) regs[i] = &g_cores->pvec->r0x;
+ else if (rmod == nop1) regs[i] = &g_cores->pvec->r1x;
+ else if (rmod == nop2) regs[i] = &g_cores->pvec->r2x;
+ else if (rmod == nop3) regs[i] = &g_cores->pvec->r3x;
+ else break;
+ }
+
+ uint64_t reg_vals[3] = {*regs[0], *regs[1], *regs[2]};
+ salis_step(1);
+ uint64_t result = *regs[0];
+
+ switch (inst) {
+ case addn:
+ assert(result == reg_vals[1] + reg_vals[2]);
+ break;
+ case subn:
+ assert(result == reg_vals[1] - reg_vals[2]);
+ break;
+ case muln:
+ assert(result == reg_vals[1] * reg_vals[2]);
+ break;
+ case divn:
+ if (reg_vals[2] != 0) {
+ assert(result == reg_vals[1] / reg_vals[2]);
+ } else {
+ assert(*regs[0] == reg_vals[0]);
+ assert(*regs[1] == reg_vals[1]);
+ assert(*regs[2] == reg_vals[2]);
+ }
+
+ break;
+ }
+ }
+
+ salis_free();
+ return 0;
+}
diff --git a/test/ui/v1/3rops/vars.py b/test/ui/v1/3rops/vars.py
new file mode 100644
index 0000000..9c2a9f3
--- /dev/null
+++ b/test/ui/v1/3rops/vars.py
@@ -0,0 +1,3 @@
+flags = set()
+defines = set()
+links = set()
diff --git a/test/ui/v1/addrs/ui.c b/test/ui/v1/addrs/ui.c
new file mode 100644
index 0000000..8949c3f
--- /dev/null
+++ b/test/ui/v1/addrs/ui.c
@@ -0,0 +1,47 @@
+#if !defined(COMMAND_NEW)
+#error
+#endif
+
+void check_found(uint64_t addr, uint64_t lok, uint64_t regi) {
+ assert(mvec_get_inst(g_cores, addr - 1) == (regi % 2 == 0 ? adrf : adrb));
+ assert(mvec_get_inst(g_cores, (&g_cores->pvec->r0x)[regi]) == lok);
+}
+
+int main(void) {
+ salis_init();
+ uint64_t regi = 0;
+
+ while (mvec_is_proc_owner(g_cores, g_cores->pvec->ip, g_cores->pcur)) {
+ uint8_t inst = mvec_get_inst(g_cores, g_cores->pvec->ip);
+
+ switch (inst) {
+#define CASE(id) \
+ case key##id: \
+ check_found(g_cores->pvec->ip, lok##id, regi); \
+ regi = (regi + 1) % 4; \
+ break;
+ CASE(a)
+ CASE(b)
+ CASE(c)
+ CASE(d)
+ CASE(e)
+ CASE(f)
+ CASE(g)
+ CASE(h)
+ CASE(i)
+ CASE(j)
+ CASE(k)
+ CASE(l)
+ CASE(m)
+ CASE(n)
+ CASE(o)
+ CASE(p)
+#undef CASE
+ }
+
+ salis_step(1);
+ }
+
+ salis_free();
+ return 0;
+}
diff --git a/test/ui/v1/addrs/vars.py b/test/ui/v1/addrs/vars.py
new file mode 100644
index 0000000..9c2a9f3
--- /dev/null
+++ b/test/ui/v1/addrs/vars.py
@@ -0,0 +1,3 @@
+flags = set()
+defines = set()
+links = set()
diff --git a/test/ui/v1/allos/ui.c b/test/ui/v1/allos/ui.c
new file mode 100644
index 0000000..1a02c30
--- /dev/null
+++ b/test/ui/v1/allos/ui.c
@@ -0,0 +1,90 @@
+#if !defined(COMMAND_NEW)
+#error
+#endif
+
+#if CLONES != 2
+#error
+#endif
+
+#define CHILD_SIZE 4
+
+void check_new_proc(void) {
+ const struct Proc *proc = proc_get(g_cores, g_cores->plst);
+ assert(proc->mb0s == CHILD_SIZE);
+ assert(proc->mb1a == 0);
+ assert(proc->mb1s == 0);
+ assert(proc->r0x == 0);
+ assert(proc->r1x == 0);
+ assert(proc->r2x == 0);
+ assert(proc->r3x == 0);
+ assert(proc->s0 == 0);
+ assert(proc->s1 == 0);
+ assert(proc->s2 == 0);
+ assert(proc->s3 == 0);
+ assert(proc->s4 == 0);
+ assert(proc->s5 == 0);
+ assert(proc->s6 == 0);
+ assert(proc->s7 == 0);
+
+ uint64_t birth_addr = (uint64_t)-1;
+
+ switch (g_cores->plst) {
+ case 2:
+ birth_addr = ANC_SIZE;
+ break;
+ case 3:
+ birth_addr = ANC_SIZE + (MVEC_SIZE / 2);
+ break;
+ case 4:
+ birth_addr = ANC_SIZE + CHILD_SIZE;
+ break;
+ case 5:
+ birth_addr = ANC_SIZE + CHILD_SIZE + (MVEC_SIZE / 2);
+ break;
+ case 6:
+ birth_addr = (MVEC_SIZE / 2) - CHILD_SIZE;
+ break;
+ default:
+ assert(false);
+ }
+
+ assert(proc->ip == birth_addr);
+ assert(proc->sp == birth_addr);
+ assert(proc->mb0a == birth_addr);
+}
+
+int main(void) {
+ salis_init();
+
+ while (mvec_is_proc_owner(g_cores, proc_fetch(g_cores, 1)->ip, 1)) {
+ const struct Proc *proc_next = proc_get(g_cores, (g_cores->pcur + 1) % g_cores->pnum);
+ bool will_split = mvec_get_inst(g_cores, proc_next->ip) == splt && proc_next->mb1s;
+ uint64_t pnum = g_cores->pnum;
+
+ salis_step(1);
+
+ if (will_split) {
+ assert(g_cores->pnum == pnum + 1);
+ assert(g_cores->plst == pnum);
+
+ switch (g_cores->pnum) {
+ case 3:
+ case 4:
+ case 5:
+ case 6:
+ case 7:
+ check_new_proc();
+ break;
+ default:
+ assert(false);
+ }
+ }
+ }
+
+ assert(mvec_is_proc_owner(g_cores, proc_fetch(g_cores, 0)->ip, 0));
+ assert(g_cores->pnum == 7);
+ assert(g_cores->pvec[0].sp > MVEC_SIZE);
+
+ salis_free();
+ return 0;
+}
diff --git a/test/ui/v1/allos/vars.py b/test/ui/v1/allos/vars.py
new file mode 100644
index 0000000..9c2a9f3
--- /dev/null
+++ b/test/ui/v1/allos/vars.py
@@ -0,0 +1,3 @@
+flags = set()
+defines = set()
+links = set()
diff --git a/test/ui/v1/ifnzs/ui.c b/test/ui/v1/ifnzs/ui.c
new file mode 100644
index 0000000..57e9533
--- /dev/null
+++ b/test/ui/v1/ifnzs/ui.c
@@ -0,0 +1,46 @@
+#if !defined(COMMAND_NEW)
+#error
+#endif
+
+int main(void) {
+ salis_init();
+
+ uint64_t next_addr = 0;
+
+ while (mvec_is_proc_owner(g_cores, g_cores->pvec->ip, g_cores->pcur)) {
+ assert(g_cores->pvec->ip == next_addr);
+
+ if (mvec_get_inst(g_cores, g_cores->pvec->ip) == ifnz) {
+ switch (mvec_get_inst(g_cores, g_cores->pvec->ip + 1)) {
+ case nop0:
+ next_addr += g_cores->pvec->r0x ? 1 : 2;
+ break;
+ case nop1:
+ next_addr += g_cores->pvec->r1x ? 1 : 2;
+ break;
+ case nop2:
+ next_addr += g_cores->pvec->r2x ? 1 : 2;
+ break;
+ case nop3:
+ next_addr += g_cores->pvec->r3x ? 1 : 2;
+ break;
+ default:
+ next_addr += g_cores->pvec->r0x ? 0 : 1;
+ }
+ }
+
+ salis_step(1);
+ next_addr++;
+
+ assert(g_cores->pvec->ip == next_addr);
+ }
+
+ assert(g_cores->pvec->ip == ANC_SIZE);
+ assert(g_cores->pvec->r0x == 2);
+ assert(g_cores->pvec->r1x == 2);
+ assert(g_cores->pvec->r2x == 2);
+ assert(g_cores->pvec->r3x == 2);
+
+ salis_free();
+ return 0;
+}
diff --git a/test/ui/v1/ifnzs/vars.py b/test/ui/v1/ifnzs/vars.py
new file mode 100644
index 0000000..9c2a9f3
--- /dev/null
+++ b/test/ui/v1/ifnzs/vars.py
@@ -0,0 +1,3 @@
+flags = set()
+defines = set()
+links = set()
diff --git a/test/ui/v1/ioops/ui.c b/test/ui/v1/ioops/ui.c
new file mode 100644
index 0000000..489cb38
--- /dev/null
+++ b/test/ui/v1/ioops/ui.c
@@ -0,0 +1,55 @@
+#if !defined(COMMAND_NEW)
+#error
+#endif
+
+int main(void) {
+ salis_init();
+
+ while (mvec_is_proc_owner(g_cores, g_cores->pvec->ip, g_cores->pcur)) {
+ uint8_t inst = mvec_get_inst(g_cores, g_cores->pvec->ip);
+
+ if (inst != load && inst != wrte) {
+ salis_step(1);
+ continue;
+ }
+
+ uint64_t *regs[2] = {
+ &g_cores->pvec->r0x,
+ &g_cores->pvec->r0x,
+ };
+
+ for (uint64_t i = 0; i < 2; i++) {
+ uint8_t rmod = mvec_get_inst(g_cores, g_cores->pvec->ip + 1 + i);
+ if (rmod == nop0) regs[i] = &g_cores->pvec->r0x;
+ else if (rmod == nop1) regs[i] = &g_cores->pvec->r1x;
+ else if (rmod == nop2) regs[i] = &g_cores->pvec->r2x;
+ else if (rmod == nop3) regs[i] = &g_cores->pvec->r3x;
+ else break;
+ }
+
+ if (g_cores->pvec->sp != *regs[0]) {
+ salis_step(1);
+ continue;
+ }
+
+ uint64_t reg_vals[2] = {*regs[0], *regs[1]};
+
+ assert(g_cores->pvec->sp == *regs[0]);
+ salis_step(1);
+ assert(g_cores->pvec->sp == g_cores->pvec->ip);
+
+ switch (inst) {
+ case load:
+ assert(*regs[1] == (uint64_t)mvec_get_inst(g_cores, reg_vals[0]));
+ break;
+ case wrte:
+ assert(*regs[0] == reg_vals[0]);
+ assert(*regs[1] == reg_vals[1]);
+ assert(mvec_get_inst(g_cores, *regs[0]) == *regs[1] % INST_CAP);
+ break;
+ }
+ }
+
+ salis_free();
+ return 0;
+}
diff --git a/test/ui/v1/ioops/vars.py b/test/ui/v1/ioops/vars.py
new file mode 100644
index 0000000..9c2a9f3
--- /dev/null
+++ b/test/ui/v1/ioops/vars.py
@@ -0,0 +1,3 @@
+flags = set()
+defines = set()
+links = set()
diff --git a/test/ui/v1/jumps/ui.c b/test/ui/v1/jumps/ui.c
new file mode 100644
index 0000000..61514f5
--- /dev/null
+++ b/test/ui/v1/jumps/ui.c
@@ -0,0 +1,21 @@
+#if !defined(COMMAND_NEW)
+#error
+#endif
+
+int main(void) {
+ salis_init();
+
+ uint8_t lok = loka;
+
+ while (lok != lokp) {
+ if (mvec_get_inst(g_cores, g_cores->pvec->ip) == lok) {
+ lok = lok + 1;
+ }
+
+ salis_step(1);
+ assert(g_cores->pvec->ip < ANC_SIZE);
+ }
+
+ salis_free();
+ return 0;
+}
diff --git a/test/ui/v1/jumps/vars.py b/test/ui/v1/jumps/vars.py
new file mode 100644
index 0000000..9c2a9f3
--- /dev/null
+++ b/test/ui/v1/jumps/vars.py
@@ -0,0 +1,3 @@
+flags = set()
+defines = set()
+links = set()
diff --git a/test/ui/v1/mbops/ui.c b/test/ui/v1/mbops/ui.c
new file mode 100644
index 0000000..8a92d6f
--- /dev/null
+++ b/test/ui/v1/mbops/ui.c
@@ -0,0 +1,36 @@
+#if !defined(COMMAND_NEW)
+#error
+#endif
+
+int main(void) {
+ salis_init();
+
+ while (g_cores->pvec->ip < ANC_SIZE) {
+ bool on_swap = mvec_get_inst(g_cores, g_cores->pvec->ip) == bswp;
+ bool on_clear = mvec_get_inst(g_cores, g_cores->pvec->ip) == bclr;
+
+ uint64_t mb0a = g_cores->pvec->mb0a;
+ uint64_t mb0s = g_cores->pvec->mb0s;
+ uint64_t mb1a = g_cores->pvec->mb1a;
+ uint64_t mb1s = g_cores->pvec->mb1s;
+
+ salis_step(1);
+
+ if (on_swap) {
+ if (mb1s) {
+ assert(g_cores->pvec->mb0a == mb1a);
+ assert(g_cores->pvec->mb0s == mb1s);
+ assert(g_cores->pvec->mb1a == mb0a);
+ assert(g_cores->pvec->mb1s == mb0s);
+ }
+ }
+
+ if (on_clear) {
+ assert(g_cores->pvec->mb1a == 0);
+ assert(g_cores->pvec->mb1s == 0);
+ }
+ }
+
+ salis_free();
+ return 0;
+}
diff --git a/test/ui/v1/mbops/vars.py b/test/ui/v1/mbops/vars.py
new file mode 100644
index 0000000..9c2a9f3
--- /dev/null
+++ b/test/ui/v1/mbops/vars.py
@@ -0,0 +1,3 @@
+flags = set()
+defines = set()
+links = set()
diff --git a/test/ui/v1/stack/ui.c b/test/ui/v1/stack/ui.c
new file mode 100644
index 0000000..1ad047e
--- /dev/null
+++ b/test/ui/v1/stack/ui.c
@@ -0,0 +1,75 @@
+#if !defined(COMMAND_NEW)
+#error
+#endif
+
+int main(void) {
+ salis_init();
+
+ while (mvec_is_proc_owner(g_cores, g_cores->pvec->ip, g_cores->pcur)) {
+ uint8_t inst = mvec_get_inst(g_cores, g_cores->pvec->ip);
+
+ if (inst != pshn && inst != popn) {
+ salis_step(1);
+ continue;
+ }
+
+ uint64_t *reg = &g_cores->pvec->r0x;
+
+ switch (mvec_get_inst(g_cores, g_cores->pvec->ip + 1)) {
+ case nop0:
+ reg = &g_cores->pvec->r0x;
+ break;
+ case nop1:
+ reg = &g_cores->pvec->r1x;
+ break;
+ case nop2:
+ reg = &g_cores->pvec->r2x;
+ break;
+ case nop3:
+ reg = &g_cores->pvec->r3x;
+ break;
+ }
+
+ uint64_t reg_val = *reg;
+ uint64_t stack_val[8] = {
+ g_cores->pvec->s0,
+ g_cores->pvec->s1,
+ g_cores->pvec->s2,
+ g_cores->pvec->s3,
+ g_cores->pvec->s4,
+ g_cores->pvec->s5,
+ g_cores->pvec->s6,
+ g_cores->pvec->s7,
+ };
+
+ salis_step(1);
+
+ switch (inst) {
+ case pshn:
+ assert(*reg == reg_val);
+ assert(g_cores->pvec->s0 == *reg);
+ assert(g_cores->pvec->s1 == stack_val[0]);
+ assert(g_cores->pvec->s2 == stack_val[1]);
+ assert(g_cores->pvec->s3 == stack_val[2]);
+ assert(g_cores->pvec->s4 == stack_val[3]);
+ assert(g_cores->pvec->s5 == stack_val[4]);
+ assert(g_cores->pvec->s6 == stack_val[5]);
+ assert(g_cores->pvec->s7 == stack_val[6]);
+ break;
+ case popn:
+ assert(*reg == stack_val[0]);
+ assert(g_cores->pvec->s0 == stack_val[1]);
+ assert(g_cores->pvec->s1 == stack_val[2]);
+ assert(g_cores->pvec->s2 == stack_val[3]);
+ assert(g_cores->pvec->s3 == stack_val[4]);
+ assert(g_cores->pvec->s4 == stack_val[5]);
+ assert(g_cores->pvec->s5 == stack_val[6]);
+ assert(g_cores->pvec->s6 == stack_val[7]);
+ assert(g_cores->pvec->s7 == 0);
+ break;
+ }
+ }
+
+ salis_free();
+ return 0;
+}
diff --git a/test/ui/v1/stack/vars.py b/test/ui/v1/stack/vars.py
new file mode 100644
index 0000000..9c2a9f3
--- /dev/null
+++ b/test/ui/v1/stack/vars.py
@@ -0,0 +1,3 @@
+flags = set()
+defines = set()
+links = set()
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