test/ui/v1/1rops/ui.c


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#if !defined(COMMAND_NEW)
#error
#endif

int main(void) {
    salis_init();

    while (mvec_is_proc_owner(g_cores, g_cores->pvec->ip, g_cores->pcur)) {
        uint8_t inst = mvec_get_inst(g_cores, g_cores->pvec->ip);

        if (inst != incn && inst != decn && inst != notn && inst != shfl && inst != shfr && inst != zero && inst != unit) {
            salis_step(1);
            continue;
        }

        uint64_t *reg = &g_cores->pvec->r0x;

        switch (mvec_get_inst(g_cores, g_cores->pvec->ip + 1)) {
        case nop0:
            reg = &g_cores->pvec->r0x;
            break;
        case nop1:
            reg = &g_cores->pvec->r1x;
            break;
        case nop2:
            reg = &g_cores->pvec->r2x;
            break;
        case nop3:
            reg = &g_cores->pvec->r3x;
            break;
        }

        uint64_t reg_val = *reg;

        salis_step(1);

        switch (inst) {
        case incn:
            assert(*reg == reg_val + 1);
            break;
        case decn:
            assert(*reg == reg_val - 1);
            break;
        case notn:
            assert(*reg == !reg_val);
            break;
        case shfl:
            assert(*reg == reg_val << 1);
            break;
        case shfr:
            assert(*reg == reg_val >> 1);
            break;
        case zero:
            assert(*reg == 0);
            break;
        case unit:
            assert(*reg == 1);
            break;
        }
    }

    salis_free();
    return 0;
}